{"created":"2023-05-15T12:37:23.894929+00:00","id":2204,"links":{},"metadata":{"_buckets":{"deposit":"f071f1d8-4f5a-4b8e-9fc9-e31a49ea1e0d"},"_deposit":{"created_by":4,"id":"2204","owners":[4],"pid":{"revision_id":0,"type":"depid","value":"2204"},"status":"published"},"_oai":{"id":"oai:kutarr.kochi-tech.ac.jp:00002204","sets":["7"]},"author_link":["7277"],"item_4_alternative_title_20":{"attribute_name":"その他のタイトル","attribute_value_mlt":[{"subitem_alternative_title":"A Study on FPGA Circuit Optimization of Data-Driven Processor - Focusing on Data Transfer Control -"}]},"item_4_biblio_info_7":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2022-03","bibliographicIssueDateType":"Issued"},"bibliographic_titles":[{}]}]},"item_4_identifier_registration":{"attribute_name":"ID登録","attribute_value_mlt":[{"subitem_identifier_reg_text":"10.32149/00002478","subitem_identifier_reg_type":"JaLC"}]},"item_4_publisher_34":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"高知工科大学"}]},"item_4_text_37":{"attribute_name":"アドバイザー","attribute_value_mlt":[{"subitem_text_value":"岩田　誠"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"井上, 聡"}],"nameIdentifiers":[{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2022-06-27"}],"displaytype":"detail","filename":"1245117.pdf","filesize":[{"value":"3.9 MB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"ｍ_1245117.pdf","url":"https://kutarr.kochi-tech.ac.jp/record/2204/files/1245117.pdf"},"version_id":"942994e2-36a3-4a4e-9ef3-d3038e45599b"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"thesis","resourceuri":"http://purl.org/coar/resource_type/c_46ec"}]},"item_title":"データ駆動型プロセッサのFPGA 向き回路最適化手法の検討～データ転送制御回路に着目した最適化～","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"データ駆動型プロセッサのFPGA 向き回路最適化手法の検討～データ転送制御回路に着目した最適化～"}]},"item_type_id":"4","owner":"4","path":["7"],"pubdate":{"attribute_name":"公開日","attribute_value":"2022-06-27"},"publish_date":"2022-06-27","publish_status":"0","recid":"2204","relation_version_is_last":true,"title":["データ駆動型プロセッサのFPGA 向き回路最適化手法の検討～データ転送制御回路に着目した最適化～"],"weko_creator_id":"4","weko_shared_id":-1},"updated":"2023-05-15T12:57:03.559990+00:00"}