{"created":"2023-05-15T12:37:29.458497+00:00","id":2299,"links":{},"metadata":{"_buckets":{"deposit":"f881e78f-febf-4250-93e2-0c040ca8240c"},"_deposit":{"created_by":4,"id":"2299","owners":[4],"pid":{"revision_id":0,"type":"depid","value":"2299"},"status":"published"},"_oai":{"id":"oai:kutarr.kochi-tech.ac.jp:00002299","sets":["7"]},"author_link":["7396"],"item_4_alternative_title_20":{"attribute_name":"その他のタイトル","attribute_value_mlt":[{"subitem_alternative_title":"Self-Timed Data-Transfer Control Circuit mplementation Suitable for FPGA Logic-Slice Structure and Its Timing Verification"}]},"item_4_biblio_info_7":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2023-03","bibliographicIssueDateType":"Issued"},"bibliographic_titles":[{}]}]},"item_4_date_granted_65":{"attribute_name":"学位授与年月日","attribute_value_mlt":[{"subitem_dategranted":"2023-03-17"}]},"item_4_identifier_registration":{"attribute_name":"ID登録","attribute_value_mlt":[{"subitem_identifier_reg_text":"10.32149/00002571","subitem_identifier_reg_type":"JaLC"}]},"item_4_publisher_34":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"高知工科大学"}]},"item_4_text_37":{"attribute_name":"アドバイザー","attribute_value_mlt":[{"subitem_text_value":"岩田 誠"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"尾ノ井, 嶺卓"}],"nameIdentifiers":[{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2023-06-30"}],"displaytype":"detail","filename":"1255102.pdf","filesize":[{"value":"1.2 MB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"m_1255102.pdf","url":"https://kutarr.kochi-tech.ac.jp/record/2299/files/1255102.pdf"},"version_id":"f398f7ce-717b-4996-b8d9-206b12bbf1ac"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"thesis","resourceuri":"http://purl.org/coar/resource_type/c_46ec"}]},"item_title":"FPGA の論理スライス構造に適したセルフタイム型データ転送制御回路の実装法とそのタイミング検証法","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"FPGA の論理スライス構造に適したセルフタイム型データ転送制御回路の実装法とそのタイミング検証法"}]},"item_type_id":"4","owner":"4","path":["7"],"pubdate":{"attribute_name":"公開日","attribute_value":"2023-06-30"},"publish_date":"2023-06-30","publish_status":"0","recid":"2299","relation_version_is_last":true,"title":["FPGA の論理スライス構造に適したセルフタイム型データ転送制御回路の実装法とそのタイミング検証法"],"weko_creator_id":"4","weko_shared_id":-1},"updated":"2023-05-15T12:49:36.079042+00:00"}